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Semiconducting carbon nanotubes promise faster performance and lower power consumption than Si in field-effect transistors (FETs) if they can be aligned in dense arrays. Here, we demonstrate that nanotubes collected at a liquid/liquid interface self-organize to form two-dimensional (2D) nematic liquid crystals that globally align with flow. The 2D liquid crystals are transferred onto substrates in a continuous process generating dense arrays of nanotubes aligned within ±6°, ideal for electronics. Nanotube ordering improves with increasing concentration and decreasing temperature due to the underlying liquid crystal phenomena. The excellent alignment and uniformity of the transferred assemblies enable FETs with exceptional on-state current density averaging 520 μA μm −1 at only −0.6 V, and variation of only 19%. FETs with ion gel top gates demonstrate subthreshold swing as low as 60 mV decade −1 . Deposition across a 10-cm substrate is achieved, evidencing the promise of 2D nanotube liquid crystals for commercial semiconductor electronics. 

Selective deposition of semiconducting carbon nanotubes (s-CNTs) into densely packed, aligned arrays of individualized s-CNTs is necessary to realize their potential in semiconductor electronics. We report the combination of chemical contrast patterns, topography, and pre-alignment of s-CNTs via shear to achieve selective-area deposition of aligned arrays of s-CNTs. Alternate stripes of surfaces favorable and unfavorable to s-CNT adsorption were patterned with widths varying from 2000 nm down to 100 nm. Addition of topography to the chemical contrast patterns combined with shear enabled the selective-area deposition of arrays of quasi-aligned s-CNTs (∼14°) even in patterns that are wider than the length of individual nanotubes (>500 nm). When the width of the chemical and topographical contrast patterns is less than the length of individual nanotubes (<500 nm), confinement effects become dominant enabling the selective-area deposition of much more tightly aligned s-CNTs (∼7°). At a trench width of 100 nm, we demonstrate the lowest standard deviation in alignment degree of 7.6 ± 0.3° at a deposition shear rate of 4600 s −1 , while maintaining an individualized s-CNT density greater than 30 CNTs μm −1 . Chemical contrast alone enables selective-area deposition, but chemical contrast in addition to topography enables more effective selective-area deposition and stronger confinement effects, with the advantage of removal of nanotubes deposited in spurious areas via selective lift-off of the topographical features. These findings provide a methodology that is inherently scalable, and a means to deposit spatially selective, aligned s-CNT arrays for next-generation semiconducting devices. 

Abstract To exploit their charge transport properties in transistors, semiconducting carbon nanotubes must be assembled into aligned arrays comprised of individualized nanotubes at optimal packing densities. However, achieving this control on the wafer‐scale is challenging. Here, solution‐based shear in substrate‐wide, confined channels is investigated to deposit continuous films of well‐aligned, individualized, semiconducting nanotubes. Polymer‐wrapped nanotubes in organic ink are forced through sub‐mm tall channels, generating shear up to 10 000 s⁻¹uniformly aligning nanotubes across substrates. The ink volume and concentration, channel height, and shear rate dependencies are elucidated. Optimized conditions enable alignment within a ±32° window, at 50 nanotubes µm⁻¹, on 10 × 10 cm²substrates. Transistors (channel length of 1–5 µm) are fabricated parallel and perpendicular to the alignment. The parallel transistors perform with 7× faster charge carrier mobility (101 and 49 cm²V⁻¹s⁻¹assuming array and parallel‐plate capacitances, respectively) with high on/off ratio of 10⁵. The spatial uniformity varies ±10% in density, ±2° in alignment, and ±7% in mobility. Deposition occurs within seconds per wafer, and further substrate scaling is viable. Compared to random networks, aligned nanotube films promise to be a superior platform for applications including sensors, flexible/stretchable electronics, and light emitting and harvesting devices.